File brif.sub * By ASM8 v9.62 Win32 [Saturday, May 9, 2015 10:29 pm] 1 ;******************************************************************************* 2 ;* Module : BRIF.SUB 3 ;* Programmer: Tony Papadimitriou <tonyp@acm.org> 4 ;* Purpose : Example for BRSET equivalent using macro/subroutine combination 5 ;* Language : Freescale HC08/9S08 Assembly Language (aspisys.com/ASM8 v9.62+) 6 ;* Status : FREEWARE Copyright (c) 2015 by Tony Papadimitriou <tonyp@acm.org> 7 ;* Original : http://www.aspisys.com/code/hc08/brif.html 8 ;* Note(s) : Use: #Include brif.sub 9 ;******************************************************************************* 10 *** BEGIN INCLUDE FILE: C:\mot\hc08\asm\mcu.inc *** *** BEGIN INCLUDE FILE: C:\mot\hc08\asm\GB60.inc *** *** BEGIN INCLUDE FILE: C:\mot\hc08\asm\macros.inc *** *** END INCLUDE FILE: C:\mot\hc08\asm\macros.inc *** (RESUMING FILE: C:\mot\hc08\asm\GB60.inc) *** BEGIN INCLUDE FILE: C:\mot\hc08\asm\common.inc *** *** END INCLUDE FILE: C:\mot\hc08\asm\common.inc *** (RESUMING FILE: C:\mot\hc08\asm\GB60.inc) *** END INCLUDE FILE: C:\mot\hc08\asm\GB60.inc *** (RESUMING FILE: C:\mot\hc08\asm\mcu.inc) *** END INCLUDE FILE: C:\mot\hc08\asm\mcu.inc *** (RESUMING FILE: C:\mot\hc08\asm\lib\brif.sub) 15 16 #MapOff 17 #ROM 19 182C ?_OBJECT_? 20 ;******************************************************************************* 21 ; Purpose: BRSET for use with extended addresses 22 ; Input : Words following BSR/JSR/CALL instruction: 23 ; : Offset 0 = Branch Address 24 ; : Offset 2 = BitPos (15..13) & Variable Address (12..0) 25 ; Output : None 26 27 BRIFSET macro BitPos,Variable,BranchAddress 28 mreq 1,2,3:BitPos,Variable,BranchAddress 29 #ifz ]~2~ 30 brset ~@~ ;;use normal instruction 31 mexit 32 #endif 33 #if ~1~ > 7 34 merror BitPos not in range 0..7 35 #endif 36 #ifparm ~3~ = * 37 mset 3,{*} 38 #endif 39 call ~0~ ;call the emulation routine 40 dw ~2~&$1FFF|{~1~<13} ;BitPos (15..13) & Variable (12..0) 41 dw ~3~ ;Branch address 42 endm 43 44 ;------------------------------------------------------------------------------- 45 46 #spauto :ab 47 48 182C BRIFSET proc 49 FFFFFFFF pc@@ equ ::+{:ab-2} 50 [182C] 182C:8789 8B [ 6] push 51 52 0000 PBS@@ equ 0 ;Offsets (from original return PC) into hardcoded parameter block 53 0000 pos@@ next PBS@@,0 ;bit position 54 0000 var@@ next PBS@@,2 ;variable address 55 0002 branch@@ next PBS@@,2 ;branch-to address 56 57 [182F] 182F:85 [ 1] tpa 58 [1830] 1830:87 [ 2] psha ccr@@ 59 #ais 60 61 [1831] 1831:9EFE 05 [ 5] ldhx pc@@,sp ;HX = return PC 62 63 [1834] 1834:E603 [ 3] lda branch@@+1,x ;get branch address parameter 64 [1836] 1836:87 [ 2] psha 65 [1837] 1837:E602 [ 3] lda branch@@,x 66 [1839] 1839:87 [ 2] psha branch@@ ;stacked branch address 67 68 [183A] 183A:E601 [ 3] lda var@@+1,x ;get variable address 69 [183C] 183C:87 [ 2] psha 70 [183D] 183D:F6 [ 3] lda var@@,x 71 [183E] 183E:A41F [ 2] and #$1F ;mask off the bit position 72 [1840] 1840:87 [ 2] psha var@@ ;stacked pure variable address 73 74 [1841] 1841:9EE6 05 [ 4] lda ccr@@,sp 75 [1844] 1844:A4FE [ 2] and #NOT^C_ ;clear the return CCR[Carry] 76 [1846] 1846:9EE7 05 [ 4] sta ccr@@,sp 77 78 [1849] 1849:F6 [ 3] lda pos@@,x ;get bit position 79 [184A] 184A:A4E0 [ 2] and #$E0 ;mask off the variable address 80 81 [184C] 184C:AF04 [ 2] aix #PBS@@ ;non-branch returns after parms 82 [184E] 184E:9EFF 09 [ 5] sthx pc@@,sp ;update default return PC 83 84 [1851] 1851:62 [ 1] nsa ;bit position into lower nibble 85 [1852] 1852:44 [ 1] lsra ;align to Bit0 (Bits 0..2) 86 [1853] 1853:4C [ 1] inca ;make bit position one-based 87 [1854] 1854:97 [ 1] tax ;X = one-based bit position 88 89 [1855] 1855:4F [ 1] clra ;start with clear mask 90 [1856] 1856:99 [ 1] sec ;Carry will create mask 91 [1857] 1857:49 [ 1] PosToMask@@ rola 92 [1858] 1858:5BFD (1857) [ 4] dbnzx PosToMask@@ ;at the end of loop, A = mask 93 94 ;;;;;;;;;;;;;;;;;;; sei ;uncomment for atomic execution 95 96 [185A] 185A:9EFE 01 [ 5] ldhx var@@,sp ;HX -> variable to test 97 [185D] 185D:F4 [ 3] and ,x ;do the actual bit test 98 [185E] 185E:270D (186D) [ 3] beq Done@@ ;bit is clear, so exit 99 100 [1860] 1860:9EFE 03 [ 5] ldhx branch@@,sp ;update return address with 101 [1863] 1863:9EFF 09 [ 5] sthx pc@@,sp ;branch address parameter 102 103 [1866] 1866:95 [ 2] tsx 104 [1867] 1867:E604 [ 3] lda ccr@@,spx 105 [1869] 1869:AA01 [ 2] ora #C_ ;set the return CCR[Carry] 106 [186B] 186B:E704 [ 3] sta ccr@@,spx 107 108 [186D] 186D:A704 [ 2] Done@@ ais #:ais ;de-allocate temporaries 109 110 [186F] 186F:86 [ 3] pula 111 [1870] 1870:84 [ 1] tap 112 113 [1871] 1871:8A88 86 [ 9] pull 114 [1874] 1874:81 [ 6] rtc 115 116 #sp 117 ;******************************************************************************* 118 #Exit 119 ;******************************************************************************* 120 M @EndStats 120 M #Message +------------------------------------------------- 120 M #Message | Statistics (from 'macros.inc/EndStats' macro) 120 M #Message +------------------------------------------------- 120 M mdef 1,?_OBJECT_? 120 M #Message | Module size...: 73 bytes 120 M #temp 120 M mset 0 120 M #temp XRAM_END-:XRAM+1 120 M mset 0,[includes XRAM] 120 M #temp RAM_END-:RAM+1+:temp 120 M #Message | Available RAM : 4096 byte(s) [includes XRAM] 120 M #temp :temp-REQUIRED_STACK 120 M #Message | Non-stack RAM : 4046 byte(s) [includes XRAM] 120 M #Message | Available ROM : 59195 byte(s) 120 M mset 0 120 M #Message | Macros called : 32 120 M #Message | [#]PROCs used : 1 120 M #Message | Max stack used: 10 120 M #Message +------------------------------------------------- 120 endm 121 122 ; For testing under a simulator 123 124 #HideMacros 125 #MapOn 126 127 0055 TEST def $55 128 129 #XRAM 130 131 0100+0001 var rmb 1 132 133 #ROM 134 135 1875 Start proc 136 M [1875] 1875:4510 80 [ 3] ldhx #STACKTOP 136 M [1878] 1878:94 [ 2] txs 137 138 [1879] 1879:A655 [ 2] lda #TEST 139 [187B] 187B:C701 00 [ 4] sta var 140 141 ;--------------------------------------------------------------------- 142 M [187E] 187E:CD18 2C [ 6] call BRIFSET ;call the emulation routine 142 M [1881] 1881.0100 dw var&$1FFF|0 ;BitPos (15..13) & Variable (12..0) 142 M [1883] 1883.1886 dw T1 ;Branch address 143 [1885] 1885:9D [ 1] nop ;used to see if branch is taken 144 ;--------------------------------------------------------------------- 145 M [1886] 1886:CD18 2C [ 6] call BRIFSET ;call the emulation routine 145 M [1889] 1889.2100 dw var&$1FFF|8192 ;BitPos (15..13) & Variable (12..0) 145 M [188B] 188B.188E dw T2 ;Branch address 146 [188D] 188D:9D [ 1] nop ;used to see if branch is taken 147 ;--------------------------------------------------------------------- 148 M [188E] 188E:CD18 2C [ 6] call BRIFSET ;call the emulation routine 148 M [1891] 1891.4100 dw var&$1FFF|16384 ;BitPos (15..13) & Variable (12..0) 148 M [1893] 1893.1896 dw T3 ;Branch address 149 [1895] 1895:9D [ 1] nop ;used to see if branch is taken 150 ;--------------------------------------------------------------------- 151 M [1896] 1896:CD18 2C [ 6] call BRIFSET ;call the emulation routine 151 M [1899] 1899.6100 dw var&$1FFF|24576 ;BitPos (15..13) & Variable (12..0) 151 M [189B] 189B.189E dw T4 ;Branch address 152 [189D] 189D:9D [ 1] nop ;used to see if branch is taken 153 ;--------------------------------------------------------------------- 154 M [189E] 189E:CD18 2C [ 6] call BRIFSET ;call the emulation routine 154 M [18A1] 18A1.8100 dw var&$1FFF|32768 ;BitPos (15..13) & Variable (12..0) 154 M [18A3] 18A3.18A6 dw T5 ;Branch address 155 [18A5] 18A5:9D [ 1] nop ;used to see if branch is taken 156 ;--------------------------------------------------------------------- 157 M [18A6] 18A6:CD18 2C [ 6] call BRIFSET ;call the emulation routine 157 M [18A9] 18A9.A100 dw var&$1FFF|40960 ;BitPos (15..13) & Variable (12..0) 157 M [18AB] 18AB.18AE dw T6 ;Branch address 158 [18AD] 18AD:9D [ 1] nop ;used to see if branch is taken 159 ;--------------------------------------------------------------------- 160 M [18AE] 18AE:CD18 2C [ 6] call BRIFSET ;call the emulation routine 160 M [18B1] 18B1.C100 dw var&$1FFF|49152 ;BitPos (15..13) & Variable (12..0) 160 M [18B3] 18B3.18B6 dw T7 ;Branch address 161 [18B5] 18B5:9D [ 1] nop ;used to see if branch is taken 162 ;--------------------------------------------------------------------- 163 M [18B6] 18B6:CD18 2C [ 6] call BRIFSET ;call the emulation routine 163 M [18B9] 18B9.E100 dw var&$1FFF|57344 ;BitPos (15..13) & Variable (12..0) 163 M [18BB] 18BB.18BE dw Done ;Branch address 164 [18BD] 18BD:9D [ 1] nop ;used to see if branch is taken 165 ;--------------------------------------------------------------------- 166 167 [18BE] 18BE:20FE (18BE) [ 3] Done bra * 168 169 M FFFE org Vreset 169 M [FFFE] FFFE.1875 dw Start 169 M FFCC org :ppc (Legend: [S19 address] O=Offset active, M=Macro active) ----------------------------------------------------------- S E G M E N T U S A G E R E P O R T Segment Start End Size CodObj DatObj TotObj Lines ------- ----- ----- ----- ------ ------ ------ ----- XRAM $0100 $0100 $0001 $0000 $0000 $0000 7 ROM $182C $18BF $0094 $0074 $0020 $0094 6573 DATA $FFBD $FFBF $0003 $0000 $0002 $0002 31 VECTORS $FFFE $FFFF $0002 $0000 $0002 $0002 3 Summary $182C $FFFF $E7D4 $0074 $0024 $0098 6614 ----------------------------------------------------------- O V E R A L L M E M O R Y U S A G E Total RAM size: 1 $0001 0.00 KB Total CODE size: 116 $0074 0.11 KB (63 instructions) Total DATA size: 36 $0024 0.04 KB Total IMAGE size: 152 $0098 0.15 KB Lowest address : 6188 $182C Highest address : 65535 $FFFF Address Range : 61250 $EF42 59.81 KB (Used Range: 0.25%) Number of INCLUDE files: 4 Number of MACROs called: 43 Number of [#]PROCs used: 2 Assembled 6620 lines (No Errors, Warnings: 0), CRC: $FD56 *** End of brif.sub listing ***